AI Chip Architectures

(jepeake.com)

53 points | by Finbarr 1 day ago

6 comments

  • ilaksh 2 hours ago
    Those are amazing accomplishments but I am more interested in research developments in things like In-Memory (Analog) or other different approaches.

    Companies like EnCharge, Mythic, etc.

    And much more efficient devices like RRAM, MRAM, and FETs. Like FE-FETs with AlScN.

    The stuff just coming out of research or still in research is more exciting in terms of the potential for truly huge efficiency and performance boosts.

    Taalas is interesting also because of it's efficiency and speed. Guess it was just purchased by AMD.

  • paaloeye 2 hours ago
    Not too shabby, but it shouldn't have been like 3 posts
  • pure_magic 2 hours ago
    This text is most likely AI-generated. Borderline unreadable.
    • ghurtado 1 hour ago
      There's no borderline about it.

      When the density of italicized words is about 1:1, I'm out.

    • postalrat 2 hours ago
      Most like AI generated? If you can't tell then what's the problem?
      • catlifeonmars 2 hours ago
        It’s shorthand for “it’s unreadable, but in the way an AI would write it”. I’m not OP, but that’s the issue. If it was well written (even if AI written), there would be no problem.

        As it turns out, you still need to be a good writer in order to prompt an AI to write well.

      • ghurtado 1 hour ago
        Wise people tend not to talk in absolutes, because they always realize they might be wrong.

        Ignorant people are always certain.

    • paaloeye 2 hours ago
      def. AI-assisted, both content and style style/nav. Content-wise, it looks legit, but with that amount of stuff, it's nearly impossible to say for sure.

      Not slope tho!

  • hadlock 3 hours ago
    Maybe it's just me, but between the extremely thin font and layout design, I find this extremely difficult to parse. Overuse and improper use of italics is confusing as well.
    • SomeHacker44 1 hour ago
      I didn't believe it till I tried to read it. Insane. Impossible to read.
  • brcmthrowaway 2 hours ago
    I have a feeling the hardware architecture for LLMs are completely wrong. There's no way hundreds of kilowatts is required for intelligence.. just in terms of the physics. Is there someone out there in the analog/neuromorphic computing world that could make these power-hungry monsters completely redundant?
    • skyberrys 1 hour ago
      It's more the economics of what sells that lets the power hungry monsters thrive. If you can tape out one chip design, and one gives you 1 TOPS and the other is 5 TOPS, the sales will go to the 5 TOPS because power is a downstream cost. That being said, it's only a matter of time before both chips are maximum TOPS and the only differentiator is power. My latest simulations are showing a competitive design around 70W, but I'm still confirming it and it would really be beneficial to do some data gathering tapeouts at larger nodes to feel like it's worth the risk of more expensive nodes.
      • brcmthrowaway 1 hour ago
        Systolic hardware?
        • skyberrys 43 minutes ago
          Race logic with pulses, it's a descent of systolic arrays. There is less of an array shape and more about time.
    • jagged-chisel 2 hours ago
      I have a gut feeling the particular stochastic processes we’re currently using are the wrong ones to go beyond LLMs into actual intelligence.
    • logicallee 2 hours ago
      human brain uses 20 watts.
  • jhide 2 hours ago
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